βP14113

The βP14113 is a 1-to-8 latched demultiplexer of the βP 14000 series of IPRS Băneasa, the output interface of the programmable controllers built around the βP14500 1-bit controller [1].

The I.P.R.S. Băneasa Full Line Condensed Catalog (1990) describes the βP14113 and βPC14113 as the output interface of the programmable controllers built with the 14000 series [1]. As the functional block diagram shows, they contain a „1 from 8” decoder which, depending on the A2, A1, A0 address inputs, enables one of the 8 D flip-flops to be loaded with the logic state of the D input; the data are loaded after the select address is set, on the leading edge of the X1 clock, and the RST input, active in the high state, clears all eight flip-flops (Q0 = Q1 = … = Q7 = 0) [1]. The output transfer of the controller is made sequentially, by demultiplexing, with one or more βP14113 [2].

By the catalog’s table of basic characteristics, the βP14113 works with a clock frequency of 1.0 MHz at −40…+85 °C from a 4.5…5.5 V supply, and the βPC14113 with 200 kHz at 0…+70 °C from 4.75…5.25 V, both in an MP-117 package (16 pins: 1–4 Q3…Q0, 5 D, 6 RST, 7 X1, 8 GND, 9 A2, 10 A1, 11 A0, 12–15 Q7…Q4, 16 VCC) [1].

The heading of the catalog page prints the second code as „βPC 14130”; the text and the table of characteristics give βPC 14113 [1]. The block diagram, with the function table of one flip-flop, is in the Gallery.