General view

ROS05

ICCE

Year
Unknown
Category
Components
Type
Transistors
Documentation score
1/5
Last edited
06 OCT 2026

Specifications

Material
Si
Polarity
P-channel
Structure / technology
MOSFET, dual
Max. power dissipation (Pc, Ptot, Pd)
0.2 W
Max. drain–source voltage |Vds|
30 V
Max. gate–source voltage |Vgs|
40 V
Gate–substrate voltage range (Vgb)
−30…+0.3 V
Max. drain current |Id|
0.03 A
Gate–source cut-off / threshold voltage (Vgs off, Vgs th)
−3…−6 V
Zero-gate-voltage drain current (Idss)
1…10 mA
Gate leakage current (Igss)
0.05 nA
Drain–source on-resistance (Rds on)
10…75 Ω
Forward transconductance (gm, gfs)
5 mA/V
Package
TO-99

Sources: [1]

Variants (5)

ROS05
ROS05A
ROS05B
ROS05C
ROS05D

The sources give the same data for all these codes; they do not say how the versions differ.

Click a column heading to sort. „+” adds a variant to the comparison (ROS05).

Description

The ROS05 is a silicon dual P-channel MOS field-effect transistor listed in the Agenda radioelectronistului (2nd edition, 1989) among the field-effect transistors made in Romania by ICCE (marked in the Agenda as a CCSIT-CE component), in a TO-99 package [1].

The Agenda lists the ROS05 and its versions A, B, C and D in one row, „ROS 05* (–,A,B,C,D)”, as a dual P-channel MOS transistor equal to two ROS01 transistors („=2×ROS01”) [1].

Coded as (Romanian system, internal CCSIT-CE code) [2]:

Part Meaning
RO manufacturer’s code: RO (Romania)
S silicon transistor, low power (bipolar, unijunction or field-effect)
05 identification number

Gallery

ICCE ROS05: TO-99 pinout (dual FET)No image available
TO-99 pinout (dual FET)

Documents

No documents available yet.

References

  1. [1]N. Drăgulănescu – „Agenda radioelectronistului”, 2nd edition, Editura Tehnică, 1989, section 29.2 „Tranzistoare cu efect de cîmp produse în R.S.R.”, p. 547
  2. [2]N. Drăgulănescu – „Agenda radioelectronistului”, 2nd edition, Editura Tehnică, 1989, section 26.7 „Sistemul românesc (codul intern CCSIT-CE)”, p. 486